1. Field of the Invention
The present invention relates to a chip package structure. More particularly, the present invention relates to a stacked chip package structure.
2. Description of the Related Art
In the semiconductor manufacturing industry, the development of system-on-chip packages is affected by their relatively low yield and high production cost so that mass production is infeasible. Therefore, the higher yield stacked chip package structure, which can have a design meeting the chip scale package specification of most small electronic devices, is produced as a substitute.
FIG. 1 is a schematic side view showing the bonded wires inside a conventional chip package structure. The chip package structure 100 includes a substrate 110, a first chip 120 and a second chip 130 disposed on the first chip 120. The bonding pads 122 on the first chip 120 are electrically connected to the first contacts 112 on the substrate 110 via a plurality of first wires 124, and the first wires 124 belong to a first wire-bonding level. The second bonding pads 132 on the second chip 130 are electrically connected to the second contacts 114 on the substrate 110 via a plurality of second wires 134, and the second wires 134 belong to a second wire-bonding level. The second chip 130 is substantially located at the central region of the first chip 120. Furthermore, the central area of the first chip 120 can normally accommodate a single second chip 130 only. The area surrounding the central chip is mainly used for distributing the first bonding pads 122 for wire bonding. In addition, the distance D2 separating the first bonding parIs 122 distributed within the peripheral region of the first chip 120 from their corresponding first contacts 112 must be uniform. Similarly, the distance D1 separating the second bonding pads 132 distributed around the peripheral region of the second chip 130 from their corresponding second contacts 114 must be uniform.
It should be noted that the second wires 134 connecting the second bonding pads 132 to the respective second contacts 114 are rather long due to a greater distance of separation and has to cross over the first wires 124. When the distance separating the first wires 134 and the second wires 124 is reduced or if the molding flow process impacts the second conductive wires 134 and forces a sweep displacement, unwanted contacts between the first and the second wires 124, 134 in different wire-bonding levels may occur. Therefore, how to reduce the wire-bonding distance of the second wires 134 and prevent accidental contact between the bonding wires from different wire-bonding layers is an important issue to be resolved.